Maxim-integrated Ultra-High-Speed Flash Microcontroller Bedienungsanleitung

Functional DiagramsPin Configurations appear at end of data sheet.Functional Diagrams continued at end of data sheet.UCSP is a trademark of Maxim Inte

Timer Mode Control (TMOD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-17Timer 0 LSB (TL0) . .

7-8Ultra-High-Speed FlashMicrocontroller User’s GuideRing Oscillator Wake-Up From StopA typical low-power application is to keep the processor in stop

7-9Power Management ModesPower consumption in CMOS microcontrollers is a function of operating frequency. The power management mode (PMM) feature allo

7-10Ultra-High-Speed FlashMicrocontroller User’s GuideINTERNALSYSTEMCLOCK(PMM)MINIMUM INSTRUCTION CYCLEEXTERNALCLOCK1024 CLOCKSFigure 7-3. Internal Ti

7-11SwitchbackThe switchback feature solves one of the most vexing problems faced by power-conscious systems. Many applications are unable touse the s

7-12Ultra-High-Speed FlashMicrocontroller User’s GuideClock Source SelectionThe ultra-high-speed flash microcontroller family supports three clock sou

8-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 8: RESET CONDITIONSThis section contains the following information:Reset Sources . . . .

8-2Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 8: RESET CONDITIONSThe condition that causes the microcontroller to vector to address 000

8-3External ResetIf the RST input is asserted to logic 1, the device is forced into a reset state. An external reset is accomplished by holding the RS

9-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 9: INTERRUPTSThis section contains the following information:Interrupt Overview . . . .

9-2Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 9: INTERRUPTSThe ultra-high-speed microcontroller family improves upon the traditional 80

Timer 2 Capture LSB (RCAP2H) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-34Timer 2 LSB (TL2) . . .

9-3When an interrupt condition occurs, the processor indicates this by setting a flag bit. This flag bit cannot alone cause an interrupt, andis set re

9-4Ultra-High-Speed FlashMicrocontroller User’s GuideThe watchdog interrupt usually has a different connotation than the timer interrupts. Unless the

9-5ally under control of the external signal, and the flag rises and falls with the pin level. All interrupt flags are evaluated on the final exe-cuti

9-6Ultra-High-Speed FlashMicrocontroller User’s GuideInterrupt LatencyInterrupt response time is normally between 4 and 18 memory cycles, depending on

10-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 10: I/O PORTSThis section contains the following information:Parallel I/O . . . . . . .

10-2Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 10: I/O PORTSThe ultra-high-speed flash microcontroller provides 8-bit I/O ports. Each p

10-3ADDRESSA8-A15ADDRESSCONTROLDQQINTERNALDATA BUSWRITEENABLEREADENABLEREADLATCH/PINPORT2.nVCCDELAY= 2TclkVCCVCCFigure 10-2. Port 2 Functional Circuit

10-4Ultra-High-Speed FlashMicrocontroller User’s GuidePort 1Port 1 functions as both an 8-bit bidirectional I/O port and an alternate functional inter

10-5XTAL1ALEPORT 0PORT 2PSENC1 C2 C3 C4 C1 C2 C1 C2EXT CODE FETCHESPAGE MISSINTERNAL MEMORY CYCLESPAGE HIT PAGE HITMSB ADDLSB ADD LSB ADD LSB ADDDATA

10-6Ultra-High-Speed FlashMicrocontroller User’s GuideThe special functions and the associated port pins are listed below:P1.0 T2 Timer 2 outputP1.1 T

4-4Ultra-High-Speed FlashMicrocontroller User’s GuideLIST OF TABLESTable 4-1. Instructions that Affect Flag Settings . . . . . . . . . . . . . . . .

10-7Transition current is available to help move the port pin from logic 0 to logic 1. Since the logic 0 driver is strong, no additional drivecurrent

11-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 11: PROGRAMMABLE TIMERSThis section contains the following information:16-Bit Timers . .

11-2Ultra-High-Speed FlashMicrocontroller User’s GuideLIST OF FIGURESLIST OF TABLESFigure 11-1. Timers/Counters 0 and 1, Modes 0 and 1 . . . . . . . .

11-3SECTION 11: PROGRAMMABLE TIMERSThe ultra-high-speed microcontroller incorporates three 16-bit programmable timers and has a watchdog timer with a

11-4Ultra-High-Speed FlashMicrocontroller User’s GuideBIT N AMES DESCRIPTION REGISTER LOCA TION BIT POSITIONSGATE Gate control enable for INT0 pin TMO

11-5Mode 1Mode 1 configures the timer for 16-bit operation as either a timer or counter. Figure 11-1 shows that setting the TMOD select bits M1,M0 = 0

11-6Ultra-High-Speed FlashMicrocontroller User’s GuideMode 3This mode provides an 8-bit timer/counter and a second 8-bit timer as indicated in Figure

11-716-Bit Timer/Counter with Optional CaptureIn this mode, timer 2 performs a simple timer or counter function where it behaves similarly to mode 1 o

11-8Ultra-High-Speed FlashMicrocontroller User’s GuideT2 = P1.0TR2 = T2CON.2EXEN2 = T2CON.3EXF2 =T2CON.6CAPTURETIMER 2INTERRUPT01TL207TH2815TF2 =T2CON

11-9When in autoreload mode, timer 2 can also be forced to reload with the T2EX (P1.1) pin. A 1 to 0 transition forces a reload if enabled bythe EXEN2

4-5SECTION 4: PROGRAMMING MODELThis section provides a programmer’s overview of the ultra-high-speed microcontroller core. It includes information on

11-10Ultra-High-Speed FlashMicrocontroller User’s GuideAs explained above, the timer itself cannot set the TF2 interrupt flag and, therefore, cannot g

11-11Time-Base SelectionThe ultra-high-speed microcontroller allows the user to select the time base for each timer independently. In the standard 805

11-12Ultra-High-Speed FlashMicrocontroller User’s GuideWatchdog TimerThe watchdog timer reset provides CPU monitoring by requiring software to clear t

11-13The watchdog interrupt is also available for applications that do not need a true watchdog reset, but a very long timer. The interrupt isenabled

11-14Ultra-High-Speed FlashMicrocontroller User’s GuideAs discussed above, the watchdog timer has several SFR bits that contribute to its operation. I

12-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 12: SERIAL I/OThis section contains the following information:Serial Mode Summary . . .

12-2Ultra-High-Speed FlashMicrocontroller User’s GuideLIST OF FIGURESLIST OF TABLESFigure 12-1. Serial Port Mode 0 . . . . . . . . . . . . . . . . .

12-3Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 12: SERIAL I/OThe ultra-high-speed microcontroller provides two fully independent UARTs

12-4Ultra-High-Speed FlashMicrocontroller User’s GuideWhen not using the power-management mode, the baud rate for mode 2 is a function only of the osc

12-5MODE 0SERIAL PORT CLOCK FREQUENCYSYSTEM CLOCK MODEPMR REGISTER BITS4X/2X, CD1, CD0SM2 = 0 SM2 = 1Crystal multiply mode 4X 100 OSC / 3 OSC / 1Cryst

4-6Ultra-High-Speed FlashMicrocontroller User’s GuideFFh7FhFFh7Fh255128INDIRECTRAMDIRECTRAMDIRECTSPECIALFUNCTIONREGISTERS0000hFFFFh 64kPROGRAMME

12-6Ultra-High-Speed FlashMicrocontroller User’s GuideMode 1 or 3These asynchronous modes are commonly used for communication with PCs, modems, and ot

12-7Using Timer 2 for Baud-Rate GenerationTo use timer 2 as baud-rate generator for serial port 0, the timer is configured in autoreload mode. Then, e

12-8Ultra-High-Speed FlashMicrocontroller User’s GuideSerial I/O DescriptionA detailed description and block diagram of each serial mode follow. Note

12-9SM2=SCONx.5DIVIDE-BY-12D7D6D5D4D3D2D1D0LOADCLOCKOUTPUT SHIFT REGISTERS0P3.0LATCHRXDPINRECEIVE DATA BUFFERWRRDD7D6D5D4D3D2D1D0CLOCKRECEIVE SHIFT RE

12-10Ultra-High-Speed FlashMicrocontroller User’s GuideSBUFDIVIDE-BY-2D7LOADCLOCKTRANSMIT SHIFT REGISTERS0P3.1LATCHTXDPINRECEIVE DATA BUFFERWRRDCLOCKR

12-11Ultra-High-Speed FlashMicrocontroller User’s GuideMode 2Mode 2 uses a total of 11 bits in asynchronous full-duplex communication, as illustrated

12-12Ultra-High-Speed FlashMicrocontroller User’s GuideSBUFDIVIDE-BY-2D7LOADCLOCKTRANSMIT SHIFT REGISTERS0P3.1LATCHTXDPINRECEIVE DATA BUFFERWRRDCLOCKR

12-13SBUFDIVIDE-BY-2D7LOADCLOCKTRANSMIT SHIFT REGISTERS0P3.1LATCHTXDPINRECEIVE DATA BUFFERWRRDCLOCKRECEIVE SHIFT REGISTERSIREADSERIALBUFFERBAUDCLOCKLO

12-14Ultra-High-Speed FlashMicrocontroller User’s GuideMultiprocessor CommunicationThe multiprocessor communication mode makes special use of the 9th

13-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 13: TIMED-ACCESS PROTECTIONThis section contains the following information:Protected Bit

4-7Bit Addressable LocationsIn addition to direct register access, some individual bits are also accessible. These are individually addressable bits i

13-2Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 13: TIMED-ACCESS PROTECTIONThe ultra-high-speed microcontroller uses a protection featur

13-3Timed-Access Protects WatchdogAny microcontroller-based system can be faced with environmental conditions that are beyond its designed abilities.

13-4Ultra-High-Speed FlashMicrocontroller User’s GuideA transient occurs while the op code is being fetched for the first instruction. The transient c

14-1Ultra-High-Speed FlashMicrocontroller User’s GuideDetails of flags modified by each instruction are located in Section 4.SECTION 14: INSTRUCTION S

14-2Ultra-High-Speed FlashMicrocontroller User’s GuideIN STRUCTION CODEMNE MO NICD7D6D5D4D3D2D1D0H EX B YTE C YCLE E X PLANAT IONARITHMETIC O P ERDA A

14-3Ultra-High-Speed FlashMicrocontroller User’s GuideIN STRUCTION CODEMNE MO NICD7D6D5D4D3D2D1D0H EX BYTE C YCLE E X PLANAT IONRL A0 0 1 0 0 0 1 1 23

14-4Ultra-High-Speed FlashMicrocontroller User’s GuideIN STRUCTION CODEMNE MO NICD7D6D5D4D3D2D1D0H EX B YTE C YCLE EXPLANATIONMOV direct,#data0a7d71a6

14-5Ultra-High-Speed FlashMicrocontroller User’s GuideIN STRUCTION CODEMNE MO NICD7D6D5D4D3D2D1D0H EX B YTE C YCLE EXPLAN ATIONAC A L L addr 11a10a7a9

14-6Ultra-High-Speed FlashMicrocontroller User’s GuideIN STRUCTION CODEMNE MO NICD7D6D5D4D3D2D1D0H EX B YTE C YCLE EXPLAN ATIONJC re l0r71r60r50r40r30

15-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 15: PROGRAM LOADINGThis section contains the following information:ROM Loader Mode . . .

4-8Ultra-High-Speed FlashMicrocontroller User’s GuideRegister AddressingRegister addressing is used for operands that are located in one of the eight

15-2Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 15: PROGRAM LOADINGThe ultra-high-speed flash microcontroller family can perform program

15-3PROGRAM EXECUTIONINTERNAL MEMORY DISABLED EA\ =0INTERNAL MEMORY ENABLED EA\ =11RST = 1EA = 0PSEN = 0POWER-ONRESETAUTOBAUD ROUTINEAWAITING <CR&g

15-4Ultra-High-Speed FlashMicrocontroller User’s GuideSerial Program Load OperationProgram loading through a serial port is a convenient method of loa

15-5CRYSTAL FREQUENCY (MHz) TIMER RELOADLOADERBAUD RATEERROR (%)PC UARTBAUD RATEPC UARTRELOAD32.0000 F6 16667 -1.3 16457 7F3 12821 -0.2 12800 9EC 8333

15-6Ultra-High-Speed FlashMicrocontroller User’s GuideTable 15-3. Alphabetic Commands (continued)Selected commands require arguments and some commands

15-7Command SummariesBReturn the CRC-16 (cyclic redundancy check) of the internal ROM code. This self-CRC computation should always return 0000h.C [be

15-8Ultra-High-Speed FlashMicrocontroller User’s GuideLBLoad blind of internal flash memory—Loads standard Intel hex-formatted data into internal flas

15-9Error MessagesE:ARGREQAn argument or arguments are required for this command.E:BADCMDAn invalid command letter was entered.E:BADREGThis message is

Ultra-High-Speed FlashMicrocontroller User’s GuideIntel Hex File FormatAssemblers that are 8051-compatible produce an absolute output file in Intel he

Ultra-High-Speed FlashMicrocontroller User’s GuideR EV I S IONNUMB ERR EV I S IONDATES ECTIONNUMBERD ESCRI PTIO NPAGESCHANGED0 1/01 — Ini tial re le a

4-9The 16-bit data pointers (DPTRs) can be used as an absolute off-chip reference. This gives access to the entire 64kB data memorymap. An example is

4-10Ultra-High-Speed FlashMicrocontroller User’s GuideProgram Status FlagsAll program status flags are contained in the program status word at SFR loc

4-11REGISTER ADDRESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0P0 80h P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0SP 81hDPL 82hDPH 83hDPL1 84hDPH1 85h

Ultra-High-Speed FlashMicrocontroller User’s GuideMaxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied i

4-12Ultra-High-Speed FlashMicrocontroller User’s GuideREGISTER A D D RESS BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0P0 80h 1 1 1 1 1 1 1 1SP 81h

4-13SP.7–0Bits 7–0Stack Pointer. This stack pointer is written by software to identify the location where the stackbegins. The stack pointer is increm

4-14Ultra-High-Speed FlashMicrocontroller User’s GuideDPH.7–0Bits 7–0Data Pointer High 0. This register is the high byte of the standard 80C32 16-bit

4-15TSLBit 5AIDBit 4Bits 3, 2, 1SELBit 0Toggle Select. When clear (= 0), DPTR-related instructions do not affect the SEL bit. When set(= 1), the SEL b

4-16Ultra-High-Speed FlashMicrocontroller User’s GuideSTOPBit 1IDLEBit 0Stop Mode Select. Setting this bit stops program execution, halts the CPU osci

4-17GATEBit 7C/TBit 6M1, M0Bits 5, 4Timer 1 Gate Control. This bit enables/disables the ability of Timer 1 to increment.0 = Timer 1 clocks when TR1 =

4-18Ultra-High-Speed FlashMicrocontroller User’s GuideR = Unrestricted read, W = Unrestricted write, -n = Value after resetClock Control (CKCON)765432

4-19Table 4-9. MOVX InstructionMD2, MD1, MD0 STRETCH VALUE MOVX DURATION000 0 2 machine cycles001 13 machine cycles(default)010 2 4 machine cycles011

Ultra-High-Speed FlashMicrocontroller User’s GuideP1.7–0Bits 7–0INT5Bit 7INT4Bit 6INT3Bit 5INT2Bit 4TXD1Bit 3RXD1Bit 2T2EXBit 1T2Bit 0General-Purpose

4-21CKRYBit 3RGMDBit 2RGSLBit 1BGSBit 0Clock Ready. This bit indicates the status of the startup period for the crystal oscillator or crystalmultiplie

1-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 1: INTRODUCTIONMaxim’s ultra-high-speed flash microcontroller is an 8051-compatible micro

4-22Ultra-High-Speed FlashMicrocontroller User’s GuideR = Unrestricted read, W = Unrestricted write, -n = Value after resetSerial Port 0 Control (SCON

4-23RI_0Bit 0Receiver Interrupt Flag. This bit indicates that a byte of data has been received in the serial port0 buffer. In serial port mode 0, RI_0

4-24Ultra-High-Speed FlashMicrocontroller User’s GuideP2.7–0Bits 7–0Port 2. This port functions according to the table below where PAGEE = ACON.7 and

4-25ET0Bit 1EX0Bit 0Enable Timer 0 Interrupt. This bit controls the masking of the Timer 0 interrupt.0 = Disable all Timer 0 interrupts.1 = Enable all

4-26Ultra-High-Speed FlashMicrocontroller User’s GuideINT0Bit 2TXD0Bit 1RXD0Bit 0External Interrupt 0. A falling edge/low level on this pin causes an

4-27IP07.0Bit 7LPS1Bit 6LPT2Bit 5LPS0Bit 4LPT1Bit 3LPX1Bit 2LPT0Bit 1LPX0Bit 0Reserved. Read data is 1.Least Significant Priority Select Bit for Seria

4-28Ultra-High-Speed FlashMicrocontroller User’s GuideSADEN1.7–0Bits 7–0Slave Address Mask Enable Register 1. This register functions as a mask when c

4-29SM2_1Bit 5REN_1Bit 4TB8_1Bit 3RB8_1Bit 2TI_1Bit 1RI_1Multiple CPU Communications. The function of this bit is dependent on the serial port 1 mode.

4-30Ultra-High-Speed FlashMicrocontroller User’s GuideRMS2–0Bits 2–0ROM Memory Size Select 2-0. This register is used to select the maximum on-chip de

4-31Table 4-18. Data Memory AccessDME1DME0DATA MEMORYADDRESSRANGEMEMORY ACCESS0 0 0000h–FFFFh External Data Memory (default)X10000h–03FFh0400h–FFFFhIn

2-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 2: ORDERING INFORMATIONThe ultra-high-speed flash microcontroller family follows the part

4-32Ultra-High-Speed FlashMicrocontroller User’s GuidePIS2-0Bit 7, 6, 5Priority Interrupt Status Bits 2-0. These bits indicate the level of interrupt

4-33R = Unrestricted read, W = Unrestricted write, -n = Value after resetTimer 2 Control (T2CON)TF2Bit 7EXF2Bit 6Timer 2 Overflow Flag. This flag is s

4-34Ultra-High-Speed FlashMicrocontroller User’s GuideCP/RL2Bit 0Capture/Reload Select. This bit determines whether the capture or reload function is

4-35TL2.7–0Bits 7–0Timer 2 LSB. This register contains the least significant byte of Timer 2.TH2.7–0Bits 7–0Timer 2 MSB. This register contains the mo

4-36Ultra-High-Speed FlashMicrocontroller User’s GuideR = Unrestricted read, W = Unrestricted write, T = Timed-access write only, -n = Value after res

4-37RWTBit 0Reset Watchdog Timer. Setting this bit resets the watchdog timer count. This bit must be set usinga Timed Access procedure before the watc

4-38Ultra-High-Speed FlashMicrocontroller User’s GuideB.7–0Bits 7–0B Register. This register serves as a second accumulator for certain arithmetic ope

4-39R = Unrestricted read, W = Unrestricted write, -n = Value after resetExtended Interrupt Priority 0 (EIP0)7 6 5 4 3 2 1 0SFR F8h — — — LPWDI LPX5 L

5-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 5: CPU TIMINGThis section contains the following information:Oscillator . . . . . . . . .

5-2Ultra-High-Speed FlashMicrocontroller User’s GuideLIST OF FIGURESLIST OF TABLESFigure 5-1. Crystal Connection . . . . . . . . . . . . . . . . . . .

Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 3: ARCHITECTUREThis section contains the following information:ALU . . . . . . . . . . . . .

5-3XTAL1XTAL218pF18pFULTRA-HIGH-SPEEDMICROCONTROLLERTO INTERNAL CIRCUITSXTAL1XTAL2ULTRA-HIGH-SPEEDMICROCONTROLLERTO INTERNAL CIRCUITSCLOCKOSCILLA

5-4Ultra-High-Speed FlashMicrocontroller User’s GuideSystem Clock Divide ControlThe ultra-high-speed microcontroller provides the ability to speed up

5-5Instruction TimingThe ultra-high-speed microcontroller executes the industry standard 8051 instruction set. Each instruction requires a minimum of

5-6Ultra-High-Speed FlashMicrocontroller User’s Guide2-Byte InstructionsAll 2-byte instructions require a minimum of two cycles, since fetching each b

5-7SYSCLKALEPSENPORT 2PORT 0LSBLSB LSBINC DPLLSB LSB058205 86 E0 E0MSB ADDRESSINC DPSFigure 5-6. Nonpage Mode: INC Direct (Two Cycles) – INC Direct (T

5-8Ultra-High-Speed FlashMicrocontroller User’s GuideSYSCLKALEPSENPORT 2PORT 0LSBLSB LSBRETLSB LSB2200NOPMSB ADDRESS MSB ADDRESSFigure 5-8. Nonpage Mo

5-9Page Mode 1 External Timing—Pages 1:0 = 10b (Four Cycles)The page mode 1 external bus structure multiplexes port 2 to provide the address MSB and L

5-10Ultra-High-Speed FlashMicrocontroller User’s GuidePage Mode 1 External Timing—Pages 1:0 = 10b (Four Cycles) (continued)Figure 5-11 shows execution

5-11Page Mode 1 External Timing—Pages 1:0 = 10b (Four Cycles) (continued)Figure 5-13 and Figure 5-14 demonstrate the execution of the RET (1-byte, thr

5-12Ultra-High-Speed FlashMicrocontroller User’s GuidePage Mode 1 External Timing—Pages 1:0 = 01b (Two Cycles)The page mode 1 external bus structure m

Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 3: ARCHITECTUREThe architecture is based on the industry-standard 87C52 and executes the sta

5-13Page Mode 1 External Timing—Pages 1:0 = 00b (One Cycle)The page mode 1 external bus structure multiplexes port 2 to provide the address MSB and LS

5-14Ultra-High-Speed FlashMicrocontroller User’s GuidePage Mode 1 External Timing—Pages 1:0 = 00b (One Cycle) (continued)Figure 5-19 illustrates the J

5-15Page Mode 2 External Timing—Pages 1:0 = 11b The page mode 2 external bus structure multiplexes port 2 between address MSB and data. The address LS

5-16Ultra-High-Speed FlashMicrocontroller User’s GuideComparison to the 8051The original 8051 needed 12 clocks per machine cycle and most instructions

5-17INSTRUCTION HEX CODEUHSM CLOCKCYCLESUHSM TIME @25MHz8051 CLOCKCYCLES8051 TIME @25MHzUHSM vs. 8051SPEEDADVANTAGEDEC direct 15 2 80 ns 12 480 ns 6DE

5-18Ultra-High-Speed FlashMicrocontroller User’s GuideINSTRUC TION HEX CO DEU HS M CLOC KCYC LESU HS M TI ME @25MHz8051 CLOCKCYC LES8051 TIME @25MHzU

5-19INSTRUCTION HEX CODEUHSM CLOCKCYCLESUHSM TIME @25MHz8051 CLOCKCYCLES8051 TIME @25MHzUHSM vs. 8051SPEEDADVANTAGEACALL addr 11 Hex codeHex codes = 1

5-20Ultra-High-Speed FlashMicrocontroller User’s GuideTable 5-2. Instruction Speed SummaryINSTRUC TION CA TEGORYSPEEDA DVA N T AGEQUA N TITY4.0 24.8 1

6-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 6: MEMORY ACCESSThis section contains the following information:Internal Flash Memory .

6-2Ultra-High-Speed FlashMicrocontroller User’s GuideLIST OF FIGURESLIST OF TABLESFigure 6-1. Memory Map for the DS89C420/430 . . . . . . . . . . . .

3-3Ultra-High-Speed FlashMicrocontroller User’s GuideScratchpad Registers (RAM)The high-speed core provides 256 bytes of scratchpad RAM for general-pu

6-3SECTION 6: MEMORY ACCESSThe ultra-high-speed flash microcontroller supports the memory interface convention established for the industry standard 8

6-4Ultra-High-Speed FlashMicrocontroller User’s GuideModification of the ROMSIZE (C2h) special function register requires using the timed access proce

6-5Option Control Register ByteUser-selectable options are present that must be set before beginning software execution. The option control register u

6-6Ultra-High-Speed FlashMicrocontroller User’s GuideInternal SRAM MemoryThe ultra-high-speed microcontroller incorporates an internal 1kB SRAM that i

6-7Internal Memory CyclesC2 C3 C4 C1 C2 C3 C4XTAL1ALEPort 0Port 2PSENC1Ext Memory CycleExt Memory CycleMSB Add

6-8Ultra-High-Speed FlashMicrocontroller User’s GuideProgram Memory Interface—Page ModesPage mode retains the basic external circuitry requirements as

6-9Page Mode 1 Bus StructureThe page mode 1 external bus structure uses P2 as the primary address bus (multiplexing both the most significant byte and

6-10Ultra-High-Speed FlashMicrocontroller User’s GuideFigure 6-5 shows external memory cycles for the page mode 1 bus structure. The first case illust

6-11Page Mode 2 Bus StructureThe page mode 2 external bus structure multiplexes the most significant address byte with data on P2 and uses P0 for the

6-12Ultra-High-Speed FlashMicrocontroller User’s GuideData Memory InterfaceAs described in Section 4, the ultra-high-speed microcontroller provides a

Ultra-High-Speed FlashMicrocontroller User’s GuideFlash MemoryOn-chip program memory is implemented in flash memory. This can be programmed in-system

6-13External Data Memory Interface—Page ModesThe ultra-high-speed flash microcontroller allows software to adjust the speed of external data memory ac

6-14Ultra-High-Speed FlashMicrocontroller User’s GuideTable 6-6. Page Mode 1—Data Memory Stretch Values Two Cycles (Pages 1:0 = 01b)Table 6-7. Page Mo

6-15Figures 6-9 and 6-10 show data memory interconnect examples for page mode 1 and page mode 2.ALECK74F373LATCHMSB ADDRESSDATA BUSLSB ADDRESSPORT 0(8

6-16Ultra-High-Speed FlashMicrocontroller User’s GuideFigures 6-11 to 6-22 illustrate the external data memory timing for the nonpage and page mode ex

6-17Page Mode 1 Data Memory Timing–PAGES 1:0 = 10b (Four Cycles)Figure 6-13 shows execution of the MOVX instruction from internal program memory with

6-18Ultra-High-Speed FlashMicrocontroller User’s GuidePage Mode 1 Data Memory Timing–Pages 1:0 = 01b (Two Cycles)Figure 6-15 below shows execution of

6-19Page Mode 1 Data Memory Timing–Pages 1:0 = 01b (Two Cycles) (continued)Figure 6-17 shows execution of a MOVX instruction with default stretch val

6-20Ultra-High-Speed FlashMicrocontroller User’s GuidePage Mode 1 Data Memory Timing–Pages 1:0 = 00b (One Cycle)Figure 6-19 illustrates execution of b

6-21Page Mode 1 Data Memory Timing–Pages 1:0 = 00b (One Cycle) (continued)Figure 6-21, still using a MOVX stretch value = 0, shows the back-to-back MO

6-22Ultra-High-Speed FlashMicrocontroller User’s GuidePage Mode 2 Data Memory Timing–Pages 1:0 = 11b (Four Cycles)All external data memory accesses ma

Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-5Memory Ma

clock cycle has been added to each MOVX instruction (for data access) and to the instruction that follows the MOVX (for code fetch)to account for pote

6-24Ultra-High-Speed FlashMicrocontroller User’s Guide; THIS LOOP IS PERFORMED R5 TIMES, IN THIS EXAMPLE 64MOVX A, @DPTR ; READ SOURCE DATA BYTE 2/

6-25; THIS LOOP IS PERFORMED R5 TIMES, IN THIS EXAMPLE 64MOVX A, @DPTR ; READ SOURCE DATA BYTE 3 +DINC DPS ; CHANGE DPTR TO DESTINATION 4 +CMOVX

7-1Ultra-High-Speed FlashMicrocontroller User’s GuideSECTION 7: POWER MANAGEMENTThis section contains the following information:Power Management Summa

7-2Ultra-High-Speed FlashMicrocontroller User’s GuideLIST OF FIGURESLIST OF TABLESFigure 7-1. Power Cycle Operaton . . . . . . . . . . . . . . . . . .

7-3SECTION 7: POWER MANAGEMENTThe ultra-high-speed flash microcontroller has several features that relate to power consumption and management. They pr

7-4Ultra-High-Speed FlashMicrocontroller User’s GuideEXIF.2 RGMD: Ring oscillator mode. Hardware sets this status bit to a 1 when the clock source is

7-5A typical application of the PFI is to place the device into a “safe mode” when a power loss appears imminent. When the interruptoccurs, the code v

7-6Ultra-High-Speed FlashMicrocontroller User’s GuidePower SavingThe ultra-high-speed flash microcontroller is implemented using full CMOS circuitry f

7-7Use of the divide-by-0.25 or 0.5 option through the clock divide control bits requires that the crystal multiplier be enabled and the spe-cific sys