Maxim-integrated MAXQ Family Users Guide: MAXQ2010 Supplement Bedienungsanleitung PDF herunterladen (Seite 49)

MAXQ Family User’s Guide:

MAXQ2010 Supplement

6-11

6.1.24 External Interrupt Flag 2 Register (EIF2, M1[06h])

Each bit in this register is set when a negative or positive edge (depending on the ITn bit setting) is detected on the cor-

responding interrupt pin. Once an external interrupt has been detected, the interrupt flag bit remains set until cleared

by software or a reset. Setting any of these bits causes the corresponding interrupt to trigger if it is enabled to do so.

Bit 7: External Interrupt 22 Edge Detect (IE22)

Bit 6: External Interrupt 21 Edge Detect (IE21)

Bit 5: External Interrupt 20 Edge Detect (IE20)

Bit 4: External Interrupt 19 Edge Detect (IE19)

Bit 3: External Interrupt 18 Edge Detect (IE18)

Bit 2: External Interrupt 17 Edge Detect (IE17)

Bit 1: External Interrupt 16 Edge Detect (IE16)

Bit 0: External Interrupt 15 Edge Detect (IE15)

6.1.25 External Interrupt Enable 0 Register (EIE0, M0[05h])

Each bit in this register controls the enable for one external interrupt. If the bit is set to 1, the interrupt is enabled (if it

is not otherwise masked). If the bit is set to 0, its corresponding interrupt is disabled.

Bit 7: External Interrupt 7 Enable (EX7)

Bit 6: External Interrupt 6 Enable (EX6)

Bit 5: External Interrupt 5 Enable (EX5)

Bit 4: External Interrupt 4 Enable (EX4)

Bit 3: External Interrupt 3 Enable (EX3)

Bit 2: External Interrupt 2 Enable (EX2)

Bit 1: External Interrupt 1 Enable (EX1)

Bit 0: External Interrupt 0 Enable (EX0)

Bit #

7 6 5 4 3 2 1 0

Name IE22 IE21 IE20 IE19 IE18 IE17 IE16 IE15

Reset 0 0 0 0 0 0 0 0

Access rw rw rw rw rw rw rw rw

Bit #

7 6 5 4 3 2 1 0

Name EX7 EX6 EX5 EX4 EX3 EX2 EX1 EX0

Reset 0 0 0 0 0 0 0 0

Access rw rw rw rw rw rw rw rw

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Maxim-integrated MAXQ Family Users Guide: MAXQ2010 Supplement Bedienungsanleitung Seite 49