Maxim-integrated DS4830 Optical Microcontroller Bedienungsanleitung Seite 52
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DS4830 User’s Guide
52
7.2 – ADC Register Descriptions
The ADC is controlled by ADC SFR registers. The PINSEL register is used to configure pins as analog pin for ADC use.
Four of the registers, ADST, ADADDR, ADCN, and ADDATA are used for setup, control, and reading from the ADC.
There are few other registers, ETS, ADCG1-4, ADVOFF, and TOEX, which are used to adjust the gains and offsets
applied to ADC results. To avoid undesired operations, the user should not write to bits labeled as “Reserved”.
7.2.1 – ADC Control Register (ADCN)
Register Address: M2[03h]
Bit
15
14
13
12
11
10
9
8
7
6
5
5
3
2
1
0
Name
ADCCLK[2:0]
NUM_SMP[4:0]
ADDAINV
ADCONT
ADDAIE
LOC_OVR
ADACQ[3:0]
Reset
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Access
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
rw*
* Unrestricted read, but can only be written to when ADCONV = 0.
BIT
NAME
DESCRIPTION
15:13
ADCCLK[2:0]
ADC Clock Divider. These bits select the ADC conversion clock in relationship to the
Core Clock.
ADCCLK[2:0]
ADC Clock
000
System Clock/8
001
System Clock/10
010
System Clock/12
011
System Clock/14
100
System Clock/16
101
System Clock/18
110
System Clock/20
111
System Clock/40
12:8
NUM_SMP[4:0]
Interrupt After Number of Sample. These bits define interrupt after Number of ADC
Samples and are used with ADDAINV. If ADDINV is set to ‘1’, then ADC Interrupt will
occur after (NUM_SMP + 1) ADC samples and End of Sequence.
7
ADDAINV
ADC Data Available Interrupt Interval. This bit selects the condition for setting data
available interrupt flag (ADDAI).
When ADDAINV = 0, ADDAI is set after End of Sequence.
When ADDAINV = 1, ADDAI is set after End of Sequence and after ADC Samples =
(NUM_SMP + 1).
6
ADCONT
ADC Continuous Sequence Mode. Setting this bit to ‘1’ will enable the continuous
sequence mode. Clearing this bit to ‘0’ will disable the continuous sequence mode. In
single sequence mode, the ADC conversion will stop after the end of the sequence. The
user should set this bit to ‘1’, when temperature and sample and hold are also enabled.
5
ADDAIE
ADC Data Available Interrupt Enable. Setting the ADDAIE bit to ‘1’ will enable an
interrupt to be generated when the ADDAI=1. Clearing this bit to ‘0’ will disable an interrupt
from generating when ADDAI=1.
4
LOC_OVR
Location override bit. Setting this bit to ‘1’ will enable the user to select an alternate
location for storing ADC conversion results. The alternate location is defined by
ADDATA[12:8] (ALT_LOC). By default, the ADC conversion results are stored in ADC
buffer location corresponding to channel number. Refer Table 7-1.
3:0
ADACQ[3:0]
ADC Acquisition Extension Bits [3:0]. These bits are used to extend sample acquisition
time if the corresponding ADC Acquisition Extension is enabled (ADDATA.ADACQEN =1
when ADST.ADCFG is set to ‘1’). See ADC Conversion Time Section for details. The ADC
acquisition extension should not be used when the fast comparator is used for the same
channel.
- OpticalMicrocontroller 1
- User’sGuide 1
- Contents 2
- SECTION 1 – OVERVIEW 9
- DS4830 User’s Guide 10
- SECTION 2 – ARCHITECTURE 11
- 2.2 – Register Space 12
- 2.3 – Memory Types 13
- 2.5 – Data Alignment 20
- 2.6 – Reset Conditions 20
- 2.7 – Clock Generation 22
- SECTION 5 – INTERRUPTS 36
- 5.1 – Servicing Interrupts 37
- 6.1 – Detailed Description 42
- 6.3 – DAC Code Examples 45
- 7.1 – Detailed Description 46
- 7.3 – ADC Code Examples 58
- SECTION 8 – SAMPLE AND HOLD 60
- 9.1 – Detailed Description 68
- SECTION 10 – I 76
- SECTION 11 – I 89
- C-COMPATIBLE SLAVE INTERFACE 89
- 11.1 – Detailed Description 90
- 12.2 – SPI System Errors 101
- 12.3 – SPI Interrupts 102
- SECTION 13 – 3-WIRE 110
- Using PWMCN and PWMDATA 113
- Core Clock 120
- FrequencyClockPWM 123
- FrequencyFramePWM 123
- * = 01b 127
- MULTIPLIER 140
- SECTION 19 – WATCHDOG TIMER 146
- 20.1 – TAP Controller 150
- 20.2 – TAP State Control 151
- 20.3 – Communication via TAP 152
- 21.2 – Debug Mode 160
- 22.1 – Detailed Description 169
- 22.2 – Bootloader Operation 171
- 22.3 – Bootloader Commands 173
- SECTION 23 – PROGRAMMING 179
- SECTION 24 – INSTRUCTION SET 192
- SECTION 25 – UTILITY ROM 220
- 25.4 – Utility ROM Examples 227
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