Maxim-integrated MAXQ Family Users Guide: MAXQ8913 Supplement Bedienungsanleitung Seite 75

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MAXQ Family Users Guide:
MAXQ8913 Supplement
20-3
20.2.3 DAC 3 Output Register (DAC3OUT, M3[04h])
Bits 7:0: DAC 3 Output Value. This register sets the voltage output value for the DAC3 channel between zero
(DAC3OUT = 00000000b) and full scale (DAC3OUT = 11111111b). For this register value to be effective, DACEN.2
(DACEN3) must be set to 1 to enable the voltage output at pin DAC3. If DACEN3 = 0, the value stored in this register
has no effect on the voltage level of pin DAC3.
20.2.4 DAC 4 Output Register (DAC4OUT, M3[05h])
Bits 7:0: DAC 4 Output Value. This register sets the voltage output value for the DAC4 channel between zero
(DAC4OUT = 00000000b) and full scale (DAC4OUT = 11111111b). For this register value to be effective, DACEN.3
(DACEN4) must be set to 1 to enable the voltage output at pin DAC4. If DACEN4 = 0, the value stored in this register
has no effect on the voltage level of pin DAC4.
20.2.5 Current Sink Control Register (ISINKCN, M3[07h])
Bits 15:8: Current Sink 2 Output Value (ISINK2.[7:0]). Bits 15 to 8 in this register set the operating mode for current
sink output 2 (SINK2) as follows.
ISINK2 = 00h. Current output SINK2 is disabled.
ISINK2 = (01h to FFh). Current output SINK2 is enabled, with a current sink capability given by
I
SINK2
= ISINKCN[15:8] x 62.5FA
Bits 7:0: Current Sink 1 Output Value (ISINK1.[7:0]). Bits 7:0 in this register set the operating mode for current sink
output 1 (SINK1) as follows.
ISINK1 = 00h. Current output SINK1 is disabled.
ISINK1 = (01h to FFh). Current output SINK1 is enabled, with a current sink capability given by
I
SINK1
= ISINKCN[7:0] x 62.5FA
Bit #
7 6 5 4 3 2 1 0
Name DAC3OUT
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
7 6 5 4 3 2 1 0
Name DAC4OUT
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
15 14 13 12 11 10 9 8
Name ISINK2
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Bit #
7 6 5 4 3 2 1 0
Name ISINK1
Reset 0 0 0 0 0 0 0 0
Access rw rw rw rw rw rw rw rw
Maxim Integrated
Seitenansicht 74
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