Maxim-integrated MAXQ7667 Bedienungsanleitung PDF herunterladen (Seite 35)

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MAXQ7667 User’s Guide

The Accumulator Pointer Control Register (APC) controls the automatic-increment/decrement mode as well as selects the range of bits

(modulo) in the AP register that will be incremented or decremented. There are nine different unique settings for the APC register, as

listed in Table 3-1.

Table 3-1. Accumulator Pointer Control Register Settings

For the modulo increment or decrement operation, the selected range of bits in AP are incremented or decremented. However, if these

bits roll over or under, they simply wrap around without affecting the remaining bits in the accumulator pointer. So, the operations can

be defined as follows:

• Increment modulo 2: AP = AP[3:1] + ((AP[0] + 1) mod 2)

• Decrement modulo 2: AP = AP[3:1] + ((AP[0] - 1) mod 2)

• Increment modulo 4: AP = AP[3:2] + ((AP[1:0] + 1) mod 4)

• Decrement modulo 4: AP = AP[3:2] + ((AP[1:0] - 1) mod 4)

• Increment modulo 8: AP = AP[3] + ((AP[2:0] + 1) mod 8)

• Decrement modulo 8: AP = AP[3] + ((AP[2:0] - 1) mod 8)

• Increment modulo 16: AP = (AP + 1) mod 16

• Decrement modulo 16: AP = (AP - 1) mod 16

For this example, assume that all 16 accumulator registers are initially set to zero.

move AP, #02h ; select A[2] as active accumulator

move APC, #02h ; auto-increment AP[1:0] modulo 4

; AP A[0] A[1] A[2] A[3]

; 02 0000 0000 0000 0000

add #01h ; 03 0000 0000 0001 0000

add #02h ; 00 0000 0000 0001 0002

add #03h ; 01 0003 0000 0001 0002

add #04h ; 02 0003 0004 0001 0002

add #05h ; 03 0003 0004 0006 0002

APC.2

( MOD2)

APC.1

( MOD1)

APC.0

( MOD0)

APC.6

(IDS)

APC A U TO INC RE MEN T/DECRE MENT SETTING

0 0 0 X 00h

No autoincrement/decrement (default mode)

0 0 1 0 01h

Increment bit 0 of AP ( modulo 2)

0 0 1 1 41h

Decrement bit 0 of AP (modulo 2)

0 1 0 0 02h

Increment bits [1:0] of AP ( modulo 4)

0 1 0 1 42h

Decrement bits [1:0] of AP (mo dulo 4)

0 1 1 0 03h

Increment bits [2:0] of AP ( modulo 8)

0 1 1 1 43h

Decrement bits [2:0] of AP (mo dulo 8)

1 0 0 0 04h

Increment all 4 bits of AP ( modulo 16)

1 0 0 1 44h

Decrement all 4 bits of AP ( modulo 16)

1 2 ... 30 31 32 33 34 35 36 37 38 39 40 ... 346 347

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