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4-11 __________________________________________________________________________________________________________

MAXQ7667 User’s Guide

4.1.9 Watchdog Timer Control Register (WDCN)

The 8-bit WDCN register is part of the system register group and used to provide system control. It controls the watchdog timeout peri-

od and interrupt or reset generation on watchdog timeout. The watchdog timer is clocked by the internal RC oscillator. See Section 15

for a description of this register.

Watchdog Timer Control Register

4.1.10 Accumulator n Register (A[n])

Bits 15 to 0: Accumulator n Register Bits 15:0 (A[n][15:0]).

This register acts as the accumulator for all ALU arithmetic and logical

operations when selected by the accumulator pointer (AP). It can also be used as a general-purpose working register.

Bit #

76543210

Name POR EWDI WD1 WD0 WDIF WTRF EWT RWT

Reset 0 0 0 0 0 0 0 0

Access rw rw rw rw r w rw rw rw

r = read, w = write

Note: Bits 5, 4, 3, and 0 are cleared to 0 on all forms of reset; for others, see the individual bit descriptions.

Bit #

15 14 13 12 11 10 9 8

Name A[n]15 A[n]14 A[n]13 A[n]12 A[n]11 A[n]10 A[n]9 A[n]8

Reset 0 0 0 0 0 0 0 0

Access r w r w r w r w r w r w r w r w

Bit #

76543210

Name A[n]7 A[n]6 A[n]5 A[n]4 A[n]3 A[n]2 A[n]1 A[n]0

Reset 0 0 0 0 0 0 0 0

Access rw rw rw rw r w rw rw rw

r = read, w = write

Note: This register is cleared to 0000h on all forms of reset.

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Maxim-integrated MAXQ7667 Bedienungsanleitung Seite 55