PORT P0
PIN
FUN CTION
TYPE
FUN CTION ENA B LED W HEN MUL TIPLEXING/PRIORITIZATION
Special
TXEN—As TXE N this p in can be
used to control the transm it enable
of an ex ternal driver (active low).
This pin defaults to TXEN any ti me
the U ART is used. TXE N is low
when the UART is trans mitting, and
is res istively pulled high/low when
it is not.
SBUF loaded with data
P0.2/TXEN
Alternate External Inter rupt 2, Input ( EIE0.2) E X2 = 1
This port pin defaults to a weak pul lup input
after a reset. When the U ART is trans mitting,
this pin is d r iven low (active low ) to denote
that the UART is transmitting. When the
UART becomes id le the pin returns to the
configured pullup/down state (so it should
be left as a pullup in order to use this pin to
enable an external transceiver).
Special T0—Ti mer 0 (Ty pe 2) Output (T2CNA0.6) T2O E0 =1
Special T0—Timer 0 (Type 2) C ounter Input
(T2CFG0.0) C/T2 = 1 (T2CFG0[2:1])
C CF[1:0] = 00b (T2CNA0.6) T2OE0
must be 0
Special T0—Ti mer 0 (Ty pe 2) Gate Input
(T2CNA0.0)G2EN = 1 or
(T2CFG0[2:1])
C CF[1:0] = 11b and
(T2CNA0.2) CPRL2 = 1
(T2CNA0.6) T2OE0 must be 0
(T2CFG0.0) C/T2 must be 0
Special
ADC CTL—As ADC CTL this user-
prog ram mab le r ising or fal ling
edge controls the SAR ADC
sampl ing instant and start of
conversion. O ptionally, the other
edge can be used to enable the
ADC and begin acqui r ing p r ior to
sampl ing.
SARC.SARS[2:0] =
"100" or "101"
P0.3/T0/
ADC CTL
Alternate External Inter rupt 3, Input ( EIE0.3) E X3 = 1
This port pin defaults to a weak pul lup input
after a reset. If the T2OE0 is set, the pin is a
timer output, but the AD CCTL input path stil l
operates (i.e., output timer pulse can come
back in as ADCCTL). When the SAR's
conversion tr ig ger is selected as "100" this
pin is used as the ADCC TL strobe. When
SARC.SARS = "101" this pin is inverted and
then used as the AD CCTL strobe. The SAR's
behavior then depends on SARC.SARDUL,
which selects s ingle edge ( when 0) or dual
edge (w hen 1) conversions .
Special
T0B—Timer 0 (Ty pe 2) Secondary
Output
(T2CNB0.6)T2OE1 = 1
P0.4/T0B
Alternate External Inter rupt 4, Input ( EIE0.4) E X4 = 1
This port pin defaults to a weak pul lup input
after a reset. If interrupt 4 is enabled, T0B is
not permi tted at this pin.
Special T1—Ti mer 1 (Ty pe 2) Output (T2CNA1.6) T2OE0 = 1
Special T1—Timer 1 (Type 2) C ounter Input
(T2CFG1.0) C/T2 = 1
(T2CFG1[2:1])
C CF[1:0] = ! 00b
(T2CNA1.6) T2OE0 must be 0
Special T1—Ti mer 1 (Ty pe 2) Gate Input
(T2CNA1.0) G2EN = 1 or
(T2CFG1[2:1])
C CF[1:0] = 11b and
(T2CNA1.2) CPRL2 = 1
(T2CNA1.6) T2OE0 must be 0
(T2CFG1.0) C/T2 must be 0
P0.5/T1
Alternate External Inter rupt 5, Input ( EIE0.5) E X5 = 1
This port pin defaults to a weak pul lup input
after a reset. If interrupt 5 is enabled, T1 is
not permi tted at this pin.
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